I could probably write a back-end that interfaces through websockets that lets you offload the hash/nonce rotation to the faster CPU. It's not that difficult to write interfaces for ASICs also, they are generally running over serial bus of some sort, but AVX2 SHA256 is a LOT faster than the old regular CPU computation. I recall it was about 700ns to compute them before, now it's closer to 200 with the SIMD AVX2 version I use in my code.