Yes. I'd have to review the specific portion of that paper since that would be a flaw. Non-ASIC is *not* an acceptable option at all and there would never be a hard fork that would tolerate that.

The people who came up with HeavyHash pointed out that it was not general purposes chips, but that the *type* of matrix multiplication was similar to what is done in machine learning, which lowers the cost at the fab/engineering level and is inherently more competitive (vs what we see now for instance with Intel dropping their bitcoin chip efforts).

The photonic chips can run competitively on ~100nm silicon, lowering upfront fab costs an order of magnitude, and eliminating the centralization point that is ASML, the world's only EUV lithography manufacturer that you need if you want tiny transistors for maximally efficient non-photonic chips.

There are also other factors that lead to divergent design approaches regardless e.g. for machine learning, you want VLSI, whereas mining you want small individual chips spread out for ease of thermal management and maximum efficiency.