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semisol
52b4a076bcbbbdc3a1aefa3735816cf74993b1b8db202b01c883c58be7fad8bd
šŸ‘Øā€šŸ’» software developer šŸ”’ secure element firmware dev šŸ“Ø nostr.land relay all opinions are my own.

because those tasks usually can be achieved by the means of googling it and changing a few things in the code

it is a glorified lossy data compression algorithm

first of all, AI is crap at writing code, and is mostly a buzzword. second, node-based editors already exist and will achieve what you want nostr:note1fell5dd8zaux3x8gwx6tkzm5z9znswtmjsga4r20tyjyahm96hws5qdej8

not everyone wants to use a remote signer and is fine with a browser extension nostr:note16wlrvt6jwuzc5vh4wpd3elvak47c7g9fc75vrhl8h6znmn7c2d5qr8p9u2

is your node obese? check with this simple test nostr:note19dmh50dlf82pynuxnknzxgm0pk39udjphxqk5zuuz7s9fzlymzms43n3ur

Yes

Primal does not read from your relays

> to be a real person for engagement purposes

So their content can be seen, but their reactions, renotes, I thinks zaps too etc will get ignored

WPA3-Enteprise means you could route different users (guest/yourself) to different VLANs, and also if you have multiple guests, give them different credentials. You can also expire credentials after some time, etc.

Verilog is like C but VHDL is some abomination that is like C++ and Java

You should absolutely use FuseSoC. It makes it *very* easy to interface with whatever tools of your choice + package management of sorts.

Currently developing for an iCE40 UP5K with Verilog, so Yosys for synthesis and nextpnr/icestorm for the FPGA bitstream generation.

iCE40 UltraPlus is nice as they are pretty cheap, they have 1024Kbit in 4 large RAM blocks, and a RE’d open source toolchain that works great.

If you insist on using VHDL there is this: https://github.com/ghdl/ghdl-yosys-plugin

I am writing HDL… it is good except when it is not 🤣

formal verification somewhat helps